Charge-coupled device (CCD) image sensors typically include an array of photosensitive areas that collect charge carriers in response to illumination. The collected charge is subsequently transferred from the array of photosensitive areas and converted to a voltage from which an image may be reconstructed by associated circuitry. FIG. 1 depicts a conventional interline CCD image sensor 100 that contains an array of photosensitive areas 102 (each of which may include or consist essentially of a photodiode, photodetector, photocapacitor, or photoconductor) arranged in columns to form an imaging area 104. A vertical CCD (VCCD) 106 is disposed next to each column of photosensitive areas 102. As shown schematically in FIG. 1 (for only one column of photosensitive areas 102, for clarity), following an exposure period (during which charge packets 108 accumulate in the photosensitive areas 102), the charge packets 108 are transferred from the photosensitive areas 102 into respective shift-register elements 110 in the VCCDs 106, which subsequently shift the charge, row-by-row in parallel, into a horizontal CCD (HCCD) 112. The HCCD 112 then transfers the charge packets 108 serially to output circuitry 114, which may include, e.g., an output charge-sensing amplifier. The resulting data is then typically digitized, and the digitized image is displayed on a display or stored in a storage unit. As detailed below, the HCCD 112 may multiply charges therewithin by applying larger voltage levels to a portion of the transfer gate electrodes (not shown in FIG. 1) overlying the shift elements 116 in HCCD 112.
FIG. 2 is an expanded plan view along line A-A in FIG. 1. As shown, HCCD 112 is configured as a four-phase HCCD shift register, i.e., HCCD 112 features four transfer gate electrodes H1S, H1B, H2S, H2B overlying each shift element 116. FIG. 3A is a cross-sectional view along line B-B in FIG. 2 and FIGS. 3A-3C illustrate a charge-multiplying operation within HCCD 112. Transfer gate electrodes H1S, H1B, H2S, H2B are disposed over a thin gate dielectric 300. CCD charge-transfer channel 302 is typically an n-type buried channel in a p-type substrate 304. As shown in FIG. 3B, the charge-multiplying process begins at time T1 when transfer gate electrodes H1B, H2S, and H2B are held at low voltage levels and a large positive voltage level is applied to transfer gate electrode H1S. Threshold adjust barrier implants 306 formed under transfer gate electrodes H1B and H2B confine a charge packet 308 when transfer gate electrodes H1B, H2S, and H2B are all held at an equal low voltage. As shown in FIG. 3C, at a subsequent time T2, the voltage level on transfer gate electrode H1B is increased to allow charge to flow into the deep potential well under transfer gate electrode HIS. The deep potential well imparts a sufficient amount of energy to the electrons to liberate secondary electrons from the buried channel material through impact ionization, as described in U.S. Pat. No. 5,337,340, the entire disclosure of which is incorporated by reference herein. The impact ionization process multiplies (i.e., amplifies) the number of electrons in the original charge packet 308. The larger multiplied charge packet (or the signal corresponding thereto) is easier to detect than the original charge packet, enhancing performance of the image sensor.
FIG. 4 is a cross-sectional view along line C-C in FIG. 2 and illustrates the structure and location of p-type channel stop implants 400 (also depicted in FIG. 2) relative to transfer gate electrode H1S. Positively-charged holes 402 are pushed to the heavily doped channel stops 400 when a large voltage is applied to transfer gate electrode H1S. Just as electrons are multiplied by impact ionization, so are the holes 402. The multiplication of holes results in excess electrons left in CCD charge transfer channel 302 (also see FIG. 3). Spurious noise is generated when these excess electrons combine with a charge packet 308.
FIG. 5 is a cross-sectional view of one phase of another conventional charge-multiplying HCCD that utilizes additional gate electrodes to prevent spurious charge generation. As shown, additional gate electrodes 500 are utilized to shield the edges of a CCD channel transfer channel 502 from a high-voltage transfer gate electrode 504. Such designs are complex and expensive to manufacture because of the additional gate electrodes 500 and gate dielectrics 506 and 508 within the HCCD structure.
FIG. 6 is a top view of two shift elements of another conventional four-phase charge-multiplying HCCD, in which spurious charge generation is avoided by surrounding transfer gate electrodes 600 (to which a high voltage is applied) with low-voltage gates 602 and 604. The high-voltage gate 600 is thus separated from channel stops 606, and this spatial separation suppresses spurious charge generation. However, as with the structure of FIG. 5, the manufacturing process for fabricating gates 600, 602, 604 tends to be complex and expensive. Furthermore, the necessarily smaller area of gate 600 limits the amount of charge that may be held in the CCD. Thus, there is a need for designs for charge-multiplying HCCDs that are easily manufactured (i.e., that do not require utilization of additional or specially shaped gate electrodes) and that reduce or eliminate spurious charge generation due to impact ionization.